Graphic VRAM G-VRAM layout depends on display size and number of colors. The actual size is 512KB. In every mode, one pixel is addressed as one word, with 16 and 256- color modes using only 4 or 8 bits in each word. X = horizontal position of a pixel Y = vertical position of a pixel P = plane number ADR = the address corresponding to the (X,Y) pixel in 65536-color mode BIT = bits in the corresponding word display 512x512 pixels, 65536 colors effective bits 16 1 line 1024 bytes (512 words) page 0 $C00000~$C7FFFF display 512x512 pixels, 256 colors effective bits 8 1 line 1024 bytes (512 words) page 0 $C00000~$C7FFFF page 1 $C80000~$CFFFFF ADR = $C00000 + Y*1024 + X*2 BIT = P*8 ~ P*8 + 7 (bits 0-7 for page 0, bits 8-15 for page 1) display 512x512 pixels, 16 colors effective bits 4 1 line 1024 bytes (512 words) page 0 $C00000~$C7FFFF page 1 $C80000~$CFFFFF page 2 $D00000~$D7FFFF page 3 $D80000~$DFFFFF ADR = $C00000 + Y*1024 + X*2 BIT = P*4 ~ P*4 + 3 display 1024x1024 pixels, 16 colors effective bits 4 1 line 2048 bytes (1024 words) page 0 $C00000~$DFFFFF ADR = $C00000 + (Y AND 511)*1024 + (X AND 511)*2 BIT = (Y>=512)*8 + (X>=512)*4 ~ (Y>=512)*8 + (X>=512)*4 + 3 ============================================================================== Text VRAM T-VRAM has a size of 1024x1024 and 16 possible colors using 4 planes contained in 512KB of VRAM. A series of 16 pixels in a horizontal line are defined by 1 word on each of the 4 planes. 1 line 128 bytes (64 words) plane 0 $E00000~$E1FFFF plane 1 $E20000~$E3FFFF plane 2 $E40000~$E5FFFF plane 3 $E60000~$E7FFFF ============================================================================== CRT Controller address size R/W $e80000 1.w W R00 horizontal total $e80002 1.w W R01 h-sync end position $e80004 1.w W R02 horizontal display start position $e80006 1.w W R03 horizontal display end position $e80008 1.w W R04 vertical total $e8000a 1.w W R05 v-sync end position $e8000c 1.w W R06 vertical display start position $e8000e 1.w W R07 vertical display end position $e80010 1.w W R08 h-sync fine tuning $e80012 1.w W R09 raster line (for line interrupts) $e80014 1.w W R10 text display X scroll position $e80016 1.w W R11 text display Y scroll position $e80018 1.w W R12 graphic page 0 X scroll position $e8001a 1.w W R13 graphic page 0 Y scroll position $e8001c 1.w W R14 graphic page 1 X scroll position $e8001e 1.w W R15 graphic page 1 Y scroll position $e80020 1.w W R16 graphic page 2 X scroll position $e80022 1.w W R17 graphic page 2 Y scroll position $e80024 1.w W R18 graphic page 3 X scroll position $e80026 1.w W R19 graphic page 3 Y scroll position $e80028 1.w R/W R20 memory mode / display mode control $e8002a 1.w R/W R21 simultaneous access / raster copy / high speed clear / plane select $e8002c 1.w W R22 raster number (used for raster copy) $e8002e 1.w W R23 text display access mask pattern $e80481 1.b R/W cmd image capture / high speed clear / raster copy control CRTC R00($e80000): bit 15 8 7 0 ------------------------------------------------------------------ | | horizontal total | ------------------------------------------------------------------ h-sync period * no. of dots R00 = --------------------------------- -1 data display period * 8 -always set the LSB to 1 CRTC R01($e80002): bit 15 8 7 0 ------------------------------------------------------------------ | | h-sync end position | ------------------------------------------------------------------ h-sync pulse width * no. of dots R01 = ------------------------------------- -1 data display period * 8 CRTC R02($e80004): bit 15 8 7 0 ------------------------------------------------------------------ | | horizontal display start pos | ------------------------------------------------------------------ (h-sync pulse width + "back porch") * no. of dots R02 = --------------------------------------------------------- -5 data display period * 8 CRTC R03($e80006): bit 15 8 7 0 ------------------------------------------------------------------ | | horizontal display end pos. | ------------------------------------------------------------------ (h-sync pulse width - "front porch") * no. of dots R03 = ----------------------------------------------------------- -5 data display period * 8 CRTC R04($e80008): bit 15 10 9 0 ------------------------------------------------------------------ | | vertical total | ------------------------------------------------------------------ v-sync period R04 = ---------------- -1 h-sync period CRTC R05($e8000a): bit 15 10 9 0 ------------------------------------------------------------------ | | v-sync end position | ------------------------------------------------------------------ v-sync pulse width R05 = -------------------- -1 h-sync period CRTC R06($e8000c): bit 15 10 9 0 ------------------------------------------------------------------ | | vertical display start position | ------------------------------------------------------------------ v-sync pulse width + "back porch" R06 = ------------------------------------- -1 h-sync period CRTC R07($e8000e): bit 15 10 9 0 ------------------------------------------------------------------ | | vertical display end position | ------------------------------------------------------------------ v-sync period - "front porch" R07 = ----------------------------------- -1 h-sync period CRTC R08($e80010): bit 15 8 7 0 ------------------------------------------------------------------ | | h-sync fine tuning | ------------------------------------------------------------------ CRTC R09($e80012): bit 15 10 9 0 ------------------------------------------------------------------ | | raster line | ------------------------------------------------------------------ v-sync pulse width + "back porch" R09 = -------------------------------------- + raster line number h-sync period = R06 + 1 + raster line number CRTC R10($e80014): bit 15 10 9 0 ------------------------------------------------------------------ | | text x scroll | ------------------------------------------------------------------ CRTC R11($e80016): bit 15 10 9 0 ------------------------------------------------------------------ | | text y scroll | ------------------------------------------------------------------ CRTC R12($e80018): bit 15 10 9 8 0 ------------------------------------------------------------------ | | | X0 | ------------------------------------------------------------------ -in 512x512 mode only bits 0-8 are effective CRTC R13($e8001a): bit 15 10 9 8 0 ------------------------------------------------------------------ | | | Y0 | ------------------------------------------------------------------ -in 512x512 mode only bits 0-8 are effective CRTC R14($e8001c): bit 15 8 0 ------------------------------------------------------------------ | | X1 | ------------------------------------------------------------------ -not used in 1024x1024 mode CRTC R15($e8001e): bit 15 8 0 ------------------------------------------------------------------ | | Y1 | ------------------------------------------------------------------ -not used in 1024x1024 mode CRTC R16($e80020): bit 15 8 0 ------------------------------------------------------------------ | | X2 | ------------------------------------------------------------------ -not used in 1024x1024 mode CRTC R17($e80022): bit 15 8 0 ------------------------------------------------------------------ | | Y2 | ------------------------------------------------------------------ -not used in 1024x1024 mode CRTC R18($e80024): bit 15 8 0 ------------------------------------------------------------------ | | X3 | ------------------------------------------------------------------ -not used in 1024x1024 mode CRTC R19($e80026): bit 15 8 0 ------------------------------------------------------------------ | | Y3 | ------------------------------------------------------------------ -not used in 1024x1024 mode CRTC R20($e80028): bit 15 13 12 11 10 9 8 7 5 4 3 2 1 0 ------------------------------------------------------------------ | | | | | COL | |HF| VD | HD | ------------------------------------------------------------------ | | -- SIZE | G-MEM -- T-MEM bit 12 T-MEM T-VRAM usage %0 : use for display %1 : use for buffer bit 11 G-MEM G-VRAM usage %0 : use for display %1 : use for buffer (bit 10~8 become irrelevant) (G-VRAM when in 65536-color mode has the same structure) bit 10 SIZE display size %0 : 512x512 pixels %1 : 1024x1024 pixels bit 9`8 COL color mode %00 : 16 %01 : 256 %10 : undefined %11 : 65536 bit 4 HF horizontal frequency %0 : 15.98kHz %1 : 31.50kHz bit 3`2 VD vertical resolution %00 : 256 lines %01 : 512 lines %10 : 1024 lines interlaced (only when HF=%1) %11 : " bit 1`0 HD horizontal resolution %00 : 256 pixels %01 : 512 pixels %10 : 768 pixels %11 : 50MHz pixel clock mode (Compact XVI or later only) CRTC R21($e8002a): bit 15 10 9 8 7 6 5 4 3 2 1 0 ------------------------------------------------------------------ | | | | | | | | | | | | ------------------------------------------------------------------ | | AP3~AP0 CP3~CP0 MEN SA bit 9 MEN text display access mask %0 : disabled %1 : enabled bit 8 SA text screen simultaneous access %0 : disabled %1 : enabled bit 7~4 AP3~AP0 text screen simultaneous access plane select %0 : selects the plane %1 : deselects the plane bit 3~0 CP3~CP0 text screen raster copy plane select / graphic screen high-speed clear page select %0 : selects the plane/page %1 : deselects the plane/page CRTC R22($e8002c): bit 15 8 7 0 ------------------------------------------------------------------ | source raster | destination raster | ------------------------------------------------------------------ CRTC R23($e8002e): bit 15 0 ------------------------------------------------------------------ | raster pattern | ------------------------------------------------------------------ %0 : data will be updated %1 : data will not be updated CRTC command port ($e80481): bit 7 4 3 2 1 0 ---------------------------------- | |RC| 0| FC| VI| ---------------------------------- bit 3 RC text screen raster copy start %0 : stop %1 : start bit 1 FC graphic screen high-speed clear start %0 : stop %1 : start -automatically becomes 0 after the operation ends bit 0 VI image capture start %0 : stop %1 : start ============================================================================== Video Controller address size $e82000 256.w -- color palette for graphic display $e82200 256.w -- color palette for text, sprite, and BG display $e82400 1.w R0 screen mode $e82500 1.w R1 priority control $e82600 1.w R2 ON/OFF, special priority graphic palette ($e82000): 16 color mode: first 16 words are used 256 color mode: 256 words are used 65536 color mode: The data word from G-VRAM is split into high and low bytes which are used to select the high and low bytes of the output color code from the table. PH = G-VRAM data high byte PL = G-VRAM data low byte CH = output color code high byte CL = output color code low byte CH = *(unsigned char)($e82002+PH*2-PH&1) CL = *(unsigned char)($e82000+PL*2-PL&1) address size CH CL $e82000 1.b -- PL = $00 $e82001 1.b -- PL = $01 $e82002 1.b PH = $00 -- $e82003 1.b PH = $01 -- $e82004 1.b -- PL = $02 $e82005 1.b -- PL = $03 $e82006 1.b PH = $02 -- $e82007 1.b PH = $03 -- cc cc $e821f8 1.b -- PL = $fc $e821f9 1.b -- PL = $fd $e821fa 1.b PH = $fc -- $e821fb 1.b PH = $fd -- $e821fc 1.b -- PL = $fe $e821fd 1.b -- PL = $ff $e821fe 1.b PH = $fe -- $e821ff 1.b PH = $ff -- text palette ($e82200): The text/sprite/BG palette exists as 16 blocks of 16 words. The text display uses the first of these only (block 0). The value read from the palette is becomes the output color code. The sprite and BG displays can make use of any block (0 through 15). 4 bits of PCG data select the color within the palette, while the palette number is determined by the sprite scroll register or BG data area. VC R0($e82400): bit 15 3 2 1 0 ------------------------------------------------------------------ | | | COL | ------------------------------------------------------------------ SIZ bit 2 SIZ display size %0 : 512x512 pixels %1 : 1024x1024 pixels bit 1~0 COL color mode %00 : 16 colors %01 : 256 colors %10 : undefined %11 : 65536 colors -set to the same value as CRTC R20 bits 10~8 VC R1($e82500): bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 ------------------------------------------------------------------ | | SP | TX | GR | GP3 | GP2 | GP1 | GP0 | ------------------------------------------------------------------ bit 13~12 SP sprite screen priority setting bit 11~10 TX text screen priority setting bit 9~ 8 GR graphic screen priority setting bit 7~ 6 GP3 4th priority graphic screen page number bit 5~ 4 GP2 3rd priority graphic screen page number bit 3~ 2 GP1 2nd priority graphic screen page number bit 1~ 0 GP0 highest priority graphic screen page number -lower values receive higher priority -when the graphic screen has only 1 page, GP3~GP0 are handled as one set, or if there are 2 pages, GP3~GP2 and GP1~GP0 are each handled as one set VC R2($e82600): bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 ------------------------------------------------------------------ | YS| AH| | | | | | | | | | | | | | | ------------------------------------------------------------------ VHT EXON H/P B/P G/G G/T | SON TON GS4 GS3 GS2 GS1 GS0 BCON bit 15 YS video cut (disables the display even during superimpose) bit 14 AH semi-transparent (text palette 0) -operates irrespective of EXON, H/P bit 13 VHT semi-transparent (image from external video) bit 12 EXON special priority/semi-transparent mode enable bit 11 H/P %0 : select special priority mode %1 : select semi-transparent mode bit 10 B/P %0 : reserved for future use %1 : area specification by graphic display LSB bit 9 G/G semi-transparent (graphic display) bit 8 G/T semi-transparent (text/sprite display) -only effective when graphic display`s priority is high bit 7 BCON border color display ON(%1)/OFF(%0) bit 6 SON sprite display ON(%1)/OFF(%0) bit 5 TON text display ON(%1)/OFF(%0) bit 4 GS4 graphic display ON(%1)/OFF(%0) (when using 1024x1024 screen size) bit 3~0 GS3~GS0 graphic display ON(%1)/OFF(%0) (per page) (when using 512x512 screen size) -when using 1 page, set GS3~GS0 bits to the same value or when using 2 pages, set GS3~GS2 and GS1~GS0 as two separate groups ============================================================================== Sprite and BG display address size $eb0000 512.w sprite attributes $eb0800 1.w BG0 X scroll $eb0802 1.w BG0 Y scroll $eb0804 1.w BG1 X scroll $eb0806 1.w BG1 Y scroll $eb0808 1.w control $eb080a 1.w horizontal total $eb080c 1.w horizontal position $eb080e 1.w vertical position $eb0810 1.w resolution $eb8000 8192.b character graphics $eba000 8192.b character graphics $ebc000 8192.b character graphics / BG0 map $ebe000 8192.b character graphics / BG1 map The sprite attributes area contains 4 words pertaining to each of the 128 sprites. (Note that a maximum of 32 sprites can be displayed on any one scanline) Characters are organized in memory as blocks 8 pixels wide by 8 pixels tall. One long word contains all 8 pixels belonging to one line, with 4 bits being used for each pixel (total 32 bytes per 8x8 character). However, sprites are 16x16 pixels and therefore, 4 consecutive characters are grouped together. BG also uses 16x16 blocks when the display size is 512x512. When the display is 256x256, BG uses individual 8x8 blocks from the $eb8000-$eb9fff area only (BG display size is controlled by hres setting in the resolution register) The BG map areas overlap with character graphics storage. Each map is made up of 64x64 words, with each entry specifying the address, color palette, and orientation of the character which should appear. The dimensions of the entire map are 64x8=512 or 64x16=1024 pixels, twice as wide and twice as tall as the actual display. Only one BG layer is displayed in high-res mode. sprite attribute word 0: bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 ------------------------------------------------------------------ | | X | ------------------------------------------------------------------ bit 9~ 0 X sprite X position sprite attribute word 1: bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 ------------------------------------------------------------------ | | Y | ------------------------------------------------------------------ bit 9~ 0 Y sprite Y position sprite attribute word 2: bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 ------------------------------------------------------------------ | vf |hf | | palette no. | character address | ------------------------------------------------------------------ bit 15 vf when set, causes sprite to be flipped vertically bit 14 hf when set, causes sprite to be flipped horizontally bit 11~ 8 pal selects one of 16 color palettes bit 7~ 0 chr specifies the address of character graphic data (chr 0 = $eb8000, chr 1 = $eb8080, etc.) sprite attribute word 3: bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 ------------------------------------------------------------------ | | prior | ------------------------------------------------------------------ bit 1~ 0 pri 0 = invisible 1 = behind both BG0 and BG1 2 = behind BG0, in front of BG1 3 = in front of both BG0 and BG1 control registers: bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 ------------------------------------------------------------------ $eb0800 | | BG0 X position | ------------------------------------------------------------------ bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 ------------------------------------------------------------------ $eb0802 | | BG0 Y position | ------------------------------------------------------------------ bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 ------------------------------------------------------------------ $eb0804 | | BG1 X position | ------------------------------------------------------------------ bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 ------------------------------------------------------------------ $eb0806 | | BG1 Y position | ------------------------------------------------------------------ bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 ------------------------------------------------------------------ $eb0808 | |dis| |bg1 map|bg1|bg0 map|bg0| ------------------------------------------------------------------ bit 9 dis when clear, sprite and BG display are disabled (CPU access to character graphic area will speed up) bit 5~ 4 bg1map \ 0 = use BG map at $ebc000 bit 2~ 1 bg0map \ 1 = use BG map at $ebe000 2,3 = unused bit 3 bg1 enable bg1 when set bit 0 bg0 enable bg0 when set bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 ------------------------------------------------------------------ $eb080a | | horizontal total | ------------------------------------------------------------------ bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 ------------------------------------------------------------------ $eb080c | | horizontal position | ------------------------------------------------------------------ bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 ------------------------------------------------------------------ $eb080e | | vertical position | ------------------------------------------------------------------ bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 ------------------------------------------------------------------ $eb0810 | |res| vres | hres | ------------------------------------------------------------------ bit 4 res 0 = 15Khz, 1 = 31KHz bit 3~ 2 vres 0 = 256 lines 1 = 512 lines 2,3 = 1024 lines (interlaced) bit 1~ 0 hres 0 = 256 pixels 1 = 512 pixels 2 = 768 pixels 3 = 50MHz clock mode BG Map data word: bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 ------------------------------------------------------------------ | vf| hf| | palette no. | character address | ------------------------------------------------------------------ bit 15 vf when set, causes character to be flipped vertically bit 14 hf when set, causes character to be flipped horizontally bit 11~ 8 pal selects one of 16 color palettes bit 7~ 0 chr specifies the address of character graphic data